RFQ LLRF Timer Cube

• Source code
• RF frequency source
• Gate generator
• Timing system overview
• Control system overview

The RFQ LLRF Timer Cube is a circuit card that mounts onto header connectors of a Red Pitaya Stemlab 125-14 computer as shown in Figure 1. The circuit is used both for the RF Frequency Source and the Gate Generator for the Timing system. The card contains two systems that can be used independently.

The first system connects a PLL Click 8x Phase Lock Loop card that is used by the RF Frequency Source to multiply the 12.5 MHz Direct Digital Synthesizer signal from the Red Pitaya Stemlab 125-14 to 100 MHz.

The second system generates TTL level signals from the Red Pitaya Stemlab 125-14 FPGA digital output pin header to eight SMA RF connectors for the Gate Generator used in the Timing system.

The circuit also provides 5V and 3.3V output from the Red Pitaya Stemlab 125-14 that can be used to power auxiliary devices such as micro-fans or low noise amplifiers.

The schematic for the card is shown in Figure 2 and the PCB layout is shown in Figure 3.

Figure 1. RFQ LLRF Timer Cube mounted on a Red Pitaya Stemlab 125-14

Figure 2. RFQ LLRF Timer Cube Schematic

Figure 3. RFQ LLRF Timer Cube PCB layout